What is the 6502?

From the MOS 6502 Article on Wikipedia:

The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975.

The 6502 is an 8-bit processor with a 16-bit address bus.

The 6502's registers included one 8-bit accumulator register (A), two 8-bit index registers (X and Y), an 8-bit processor status register (P), an 8-bit stack pointer (S), and a 16-bit program counter (PC).

The chip used the index and stack registers effectively with several addressing modes, including a fast "direct page" or "zero page" mode.

Addressing modes also included implied (1 byte instructions); absolute (3 bytes); indexed absolute (3 bytes); indexed zero-page (2 bytes); relative (2 bytes); accumulator (1); indirect,x and indirect,y (2); and immediate (2).a

An example of Hello World in 6502 assembly for the CBM Kernel:

A_CR  = $0D              ;carriage return
BSOUT = $FFD2            ;kernel CRM sub, write to current output device
        LDX #$00         ;starting index in .X register
LOOP    LDA MSG,X        ;read message text
        BEQ LOOPEND      ;end of text
        JSR BSOUT        ;output char
        BNE LOOP         ;repeat
LOOPEND RTS              ;return from subroutine
MSG     .BYT 'Hello, world!',A_CR,$00

The 6502 instruction set is comprised of:

  • logical instructions: AND, EOR, ORA
  • shifts and rotates: ASL, LSR, ROL, ROR
  • arithmetic: ADC, SBC
  • increments and decrements: DEC, DEX, DEY, INC, INX, INY
  • comparisons: CMP, CPX, CPY
  • register transfers: TAX, TAY, TSX, TXA, TXS, TYA
  • loads and stores: LDA, LDX, LDY, STA, STX, STY
  • stack operations: PHA, PLA, PHP, PLP
  • branches and jumps: BPL, BMI, BVC, BVS, BCC, BCS, BNE, BEQ, JMP, JSR, RTS
  • flags sets and clears: CLC, SEC, CLI, SEI, CLV, CLD, SED
  • interrupt instructions: BRK, RTI
  • miscellaneous: NOP
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